In very-large-scale integration (VLSI) technology, tantalum silicide has been proposed to be useful in a variety of applications. These include: policide gate metallization (i.e., the use of tantalum silicide in combination with a doped polycrystalline silicon (poly-Si) underlayer as a low resistive gate metallization layer); silicide gate (i.e., the use of tantalum silicide as a directly deposited layer on a gate oxide to reduce sheet resistance); source-drain silicidation (i.e., the use of tantalum silicide in the silicidation of contacts thereby providing in low resistive contacts); and diffusion barrier (i.e., the use of tantalum silicide a diffusion barrier between an Al—Si—Ti layer and silicon thereby providing reliable and low resistive contacts to n+ and p+ Si). Tantalum silicon nitride (Ta—Si—N) has also been shown to form a useful conductive barrier layer between silicon substrates and copper interconnects to reduce copper diffusion.
Lee et al., “Structural and chemical stability of Ta—Si—N thin film between Si and Cu,” Thin Solid Films, 320:141–146 (1998) describe amorphous, ultra-thin (i.e., less than 100 Å) tantalum-silicon-nitrogen barrier films between silicon and copper interconnection materials used in integrated circuits. These barrier films suppress the diffusion of copper into silicon, thus improving device reliability. Barrier films having compositions ranging from Ta43Si04N53 to Ta60Si11N29 were deposited on silicon by reactive sputtering from Ta and Si targets in an Ar/N2 discharge, followed by sputter-depositing copper films.
Methods for using physical vapor deposition (PVD) methods, such as reactive sputtering, to form Ta—Si—N barrier layers are known. Hara et al., “Barrier Properties for Oxygen Diffusion in a TaSiN Layer,” Jpn J. Appl.-Phys., 36(7B), L893 (1997) describe noncrystalline, low resistivity Ta—Si—N layers that acts as a barrier to oxygen diffusion during high temperature annealing at 650° C. in the presence of O2. The Ta—Si—N layers are formed by using radio-frequency reactive sputtering with pure Ta and Si targets on a 100 nm thick polysilicon layer. Layers having relatively low silicon content, such as Ta50S16N34 are stated to have a desirable combination of good diffusion barrier resistance along with low sheet resistance. These Ta—Si—N barrier layers have improved peel resistance over Ta—N barrier layers during annealing conditions.
However, when PVD methods are used, the stoichiometric composition of the formed metal silicon nitride barrier layers such as Ta—Si—N can be non-uniform across the substrate surface due to different sputter yields of Ta, Si, and N. Due to the resulting poor layer conformality, defects such as pinholes often occur in such layers creating pathways to diffusion. As a result, the effectiveness of a physically deposited diffusion barrier layer is dependent on the layer being sufficiently thick.
Vapor deposition processes such as chemical vapor deposition (CVD) and atomic layer deposition (ALD) processes are preferable to PVD processes in order to achieve the most efficient and uniform barrier layer coverage of substrate surfaces. There remains a need for a vapor deposition process to form tantalum suicides and tantalum silicon nitride barrier layers on substrates, such as semiconductor substrates or substrate assemblies.